[Development support tool][Integrated Development Environments][LSI Design and Verification Tools]
We will be showing a new generation of SystemVerilog IDE that helps users improve design and verification productivity.
In order to adopt the latest and greatest verification methodologies such as VMM and UVM, use of sophisticated GUI tools is necessary. SystemVerilog IDE provides the user with advanced capabilities to make the best use of those methodologies.
- Consumer electronics / AV / Amusement
- New communication / Mobile / Network
- Smart Energy
- Social Infrastructure
- Medical / Nursing care
- Agriculture / Fisheries / Mining
- Finance (bank / securities / insurance)
- 8-14-1 Tateishi, Katsushika-ku, Tokyo 124-0012 Japan