Exhibitors List

Artgraphics

Booth No
D-38-②

[Simulator][Integrated Development Environments][LSI Design and Verification Tools]

Exhibit Highlights

We will be showing a SystemVerilog IDE that helps users improve design and verification productivity. The IDE features the following functions.

• Design manager
• Advanced SystemVerilog text-editor
• Navigators
• Design style checker
• SystemVerilog compiler and simulator
• RTL Logic Synthesis
• Verification features (coverage, assertions)
• Verification viewers (VCD, coverage, assertions)
• Support for UVM

Applicable field

  • Automotive
  • Consumer electronics / AV / Amusement
  • New communication / Mobile / Network
  • FA
  • Smart Energy
  • Social Infrastructure
  • Medical / Nursing care
  • Logistics
  • Agriculture / Fisheries / Mining
  • Aerospace
  • Finance (bank / securities / insurance)

Contact

Address
8-14-1 Tateishi, Katsushika-ku, Tokyo 124-0012 Japan
TEL
03-3694-7443
FAX
03-3697-9017
URL
http://www.artgraphics.co.jp
Email
contact@artgraphics.co.jp