Conference Program

Keynote Session Invited Lecture Special Lecture ET-EDSFair Session
Anniversary Session Panel Session Technical Session Smart Energy Special Seminar
Design and Validator Track DSP Track FPGA Track AnalogDesign Track
Special Session JASA Special Seminar JASA Technological Headquarters Seminar JASA Global Forum
IPA Seminar Critical Software Workshop JEITA Seminar  

FPGA Track  

FP-1 | 11.17 [thu] 10:00-10:45 Annex Hall[F202]
No Need to Fear FPGA! Introduction to FPGA Design which you can start right now
 
Ikuo Nakanishi
FAE Manager
Engineering Div
Xilinx K.K.


FP-2 | 11.17 [thu] 11:00-11:45 Annex Hall[F202]
Make full use of the ChipScope Pro XILINX debug tool
- Aren't you wasting time without knowing about it? -
Satoshi Nakamizo
PLD Dept. PLD Division
TOKYO ELECTRON DEVICE LTD.


FP-3 | 11.17 [thu] 12:00-12:45 Annex Hall[F202]
Importance of FPGA functional verification due to difficulty of debugging
 
Akio Mitsuhashi
Director
Marketing
Mentor Graphics Japan Co., Ltd.


FP-4 | 11.17 [thu] 13:00-13:45 Annex Hall[F202]
Introduction of the Altera 28nm FPGA product portfolio
- 45-minute guide to the leading-edge 28nm FPGA technology -
Eiji Hashizume
Sr. Product Marketing Manager
Marketing Department
Altera Japan,LTD.


FP-5 | 11.17 [thu] 14:00-14:45 Annex Hall[F202]
Industry first! FPGA and Tools that fully support floating-point math.h functions
- Explanation and demonstration of devices and tools supporting floating point -
Kenji Ikeda
Sr. Technology Specialist FAE
Field Applications Engineering
ALTERA JAPAN, LTD.


FP-6 | 11.17 [thu] 15:00-15:45 Annex Hall[F202]
Detailed case studies of solutions using innovative FPGA as the next-generation SOC devices
 
Shigeto Kawase
Customer Marketing Manager (Industrial)
Marketing Department
ALTERA JAPAN, LTD.


FP-7 | 11.17 [thu] 16:00-16:45 Annex Hall[F202]
FullHD Video Image Processing: Reducing development time from 6 months to 1 week
- Make better use of FPGA! -
Takashi Komata
Sr. Application Consultant
Product Specialist Group
Nihon Synopsys G.K.


FP-8 | 11.18 [fri] 10:00-10:45 Annex Hall[F202]
Up-to-date information: Implement with FPGA by Altera! Optimal embedded processor system
- Update! Introduction of an extensive processor architecture portfolio -
Takayuki Oyama
Product Marketing Manager
Marketing Department
ALTERA JAPAN, LTD.


FP-9 | 11.18 [fri] 11:00-11:45 Annex Hall[F202]
FPGA-based high speed interface solutions
- Introduction of FPGA-based V-by-One® HS and USB 3.0 solutions -
Akira Sakaguchi
Manager
Embedded Software, Advanced Technology, Strategic Technology Group
MACNICA, Inc.

Yuichi Shinoda
Manager
Circuit Design, Advanced Technology, Strategic Technology Group
MACNICA, Inc.


FP-10 | 11.18 [fri] 12:00-12:45 Annex Hall[F202]
PSoC Can do what CPLD Can't
- Add an MCU and rich analog features to your CPLD -
Brad Kadet
Business Development Manager Sr.
CCD Product Marketing
Nihon Cypress K. K.


FP-11 | 11.18 [fri] 13:00-13:45 Annex Hall[F202]
"All In" - Trend of Next Era Programmable Logic
 
Yukihiko Tachibana
Marketing Manager
Marketing Div
Xilinx K.K.


FP-12 | 11.18 [fri] 14:00-14:45 Annex Hall[F202]
FPGA Case Study: EIZO "Super- Resolution" Monitors
 
Koji Ishiwatari
Chief Engineer
R&D,ASIC
EIZO NANAO CORPORATION


FP-13 | 11.18 [fri] 15:00-15:45 Annex Hall[F202]
Interfacing 1866Mbps DDR3 SDRAM with Xilinx 28nm FPGA
 
Yasunori Amano
PLD Division
TOKYO ELECTRON DEVICE LTD.